Introduction to OUC UCIE Controller IP by OpenEdges Technology
OpenEdges Technology, Inc., the leading provider of memory subsystem intellectual property (IP), has announced the launch of the Universal Chiplet Interconnect Express (UCIE) controller IP, named OUC. UCIE is an open industry standard for die-to-die interconnect, co-developed by industry giants including AMD, ARM, ASE Group, Google Cloud, Intel, Meta, Microsoft, Qualcomm, and Samsung. This new standard is becoming a prominent trend in the semiconductor industry, owing to its benefits such as increased circuit integration, reduced production costs, and higher yields.
Contributions of OpenEdges to the UCIE Consortium
As a contributing member of the UCIE consortium, OpenEdges Technology plays a vital role in shaping the future of chip integration methodologies. The OUC, deriving its name from OpenEdges UCIE Controller, is designed for highly customizable, package-level integration, making it a pivotal component for die-to-die interconnect and protocol connections. It fosters an interoperable, multi-vendor ecosystem poised to revolutionize the semiconductor industry.
Advanced Features and Capabilities of OUC
Leveraging OpenEdges’ extensive expertise in interconnect IP development, the OUC is a versatile and highly configurable die-to-die controller that adheres to the UCIE 1.1 standard. It extends on-chip AXI interconnections to multi-die connections, providing an advanced solution for multi-die connectivity across diverse applications. Utilizing flow control units (flits), optimized for reliability and latency, the OUC effectively prevents receiver buffer overflow. Additionally, it ensures seamless communication by synchronizing AXI parameters with its link partner, accommodating different AXI configurations through padding and cropping as per the default operation rules.
Integration with OpenEdges On-Chip Interconnect IP
Designed for seamless multi-die communication, the OUC effortlessly integrates with OpenEdges’ on-chip interconnect IP, OIC. This synergy between OIC and OUC simplifies extending on-chip interconnects to form multi-chiplet interconnects. Utilizing OIC’s ActiveQOS and efficient bandwidth transfer capabilities, it meets the complex demands of today’s semiconductor needs. This groundbreaking accomplishment has been supported by the Institute of Information.
