Introduction to 3.5D XDSiP Technology
In a significant leap for AI technology, Broadcom has announced the availability of its 3.5D Extreme Dimension System in Package (XDSiP) platform. This innovative technology enables consumer AI customers to develop next-generation custom accelerators, known as XPUs. The integration of over 6000 mm² of silicon, combined with up to 12 high bandwidth memory (HBM) stacks, in one packaged device is set to transform the landscape of high-efficiency, low-power computing for AI applications.
The Advancement of Computational Power
The demands for computational power in training generative AI models continue to grow exponentially. To meet these needs, massive clusters of XPUs, ranging from 100,000 to over a million units, are essential. However, delivering the necessary performance while minimizing power consumption and overall costs requires increasingly sophisticated integrations of compute, memory, and I/O capabilities. Traditional scaling methods, like Moore’s Law, are struggling to keep pace in this rapidly evolving field.
Shifting Towards 3D Silicon Stacking
As AI technology evolves, the limitations of traditional approaches become apparent. The need for advanced system-in-package (SiP) integration is more critical than ever. Over the last decade, 2.5D integration has made notable contributions, facilitating the development of XPUs with up to 2500 mm² of silicon and HBM modules stacked on an interposer. However, the introduction of new complex large language models (LLMs) indicates that the future lies in 3D silicon stacking, which optimizes size, power, and cost-effectiveness. Thus, the 3.5D integration, which merges 3D silicon stacking with 2.5D packaging, is set to become the preferred technology for next-generation XPUs in the coming decade.
