JEDEC Publishes New SPD Standards for LPDDR5/5x Memory Modules

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The JEDEC Solid State Technology Association, recognized as a global leader in the development of microelectronics standards, has announced the release of the JESD406-5 LPDDR5/5x Serial Presence Detect (SPD) Contents V1.0. This standard aligns with the updated content of JESD401-5B DDR5 DIMM Label and JESD318 DDR5/LPDDR5 Compression Attached Memory Module (CAMM2) Common Standard.

Significance of JEDEC Standards

The JESD406-5 standard is significant as it documents the contents of the SPD non-volatile configuration device included in all JEDEC standard memory modules using LPDDR5/5x SDRAMs, including the CAMM2 standard designs outlined in JESD318. The JESD401-5B standard defines the content of standard memory module labels, using the other two standards to assist end-users in selecting compatible modules for their applications.

Technical Specifications and Implementation

JESD406-5 specifies the contents of each SPD byte, allowing application software, including BIOSes, to determine the module capacity, speed, I/O configuration, and content revision level of the module. Additionally, rounding algorithms are defined to optimize performance, whether legacy modules are plugged into new systems or new modules into legacy systems. JESD406-5 supports memory module configurations, known as “raw cards,” as documented in the JESD401-5B specification.

Future Steps and Availability

The CAMM2 Raw Card E defines an LPDDR5/5x module usable as one or two ranks of memory organized into eight subchannels, each with a x16 I/O interface. The module design is currently in process and will be available on the JEDEC website following system qualification and approval of the standard design.

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