TSMC’s semiconductor roadmap announced at the recent IEDM conference shows that the company’s development goal is chips containing trillions of transistors by 2030. IEDM is an annual conference, taking place between researchers and researchers. the world’s leading electronics manufacturer. From the presentation slides, TSMC shows that it will introduce new semiconductor processes such as A14 (1.4 nm), A10 (1 nm) (A stands for Angstrom, N stands for Nanometer), as well as plans to determine how large future chips can be at most. In addition to minimizing the process, TSMC also focuses on enhancing packaging capacity with technologies such as CoWoS, InFO, SoIC…
When a chip contains up to trillions of transistors, it is not simply a “monolithic” chip – something we have been familiar with for decades. It will be a multi-chiplet chip like the way AMD is applying from the first EPYC products. The multi-chiplet chip containing the most transistors in the world is the AMD MI300X with 153 billion trans, a collection of 12 different chiplets.
TSMC predicts that by 2030, a monolithic chip can reach a maximum “capacity” of 200 billion transistors, which is 2.5 times more than NVIDIA’s H100. Even though it sounds “huge”, the waiting time from now to the future is 6-7 years. This shows that research and development of new semiconductor processes is increasingly difficult and challenging.
